Why Doesn’t FastChip 2.3.0 Generate an
Entry in the *.c or *.h Header File for an
E5 User-Assigned Address?

In some applications, a designer may assign a specific logical address to an E5 CSL-based, memory-mapped function. This is allowed and supported. However, in FastChip 2.3.0, there is a bug that prevents FastChip from correctly generating an entry in the *.c or *.h header files created by the Generate function. This is a known bug to be fixed in subsequent FastChip versions.

The following example illustrates the problem. Assume that you assigned a Command Register to SFR space, specifically to location 0xC0, as shown below.

Later, if you click Generate in the FastChip toolbar, you would expect FastChip to automatically create an entry in the header file associating the symbolic address RESULT with the user-assigned address 0xC0. However, due to a bug in FastChip 2.3.0, the header file entry appears as shown below. The assignment for RESULT is commented out and your ‘C’ compiler will generate an error complaining about an undeclared variable.

// ==== BEGIN SOFT MODULE REGISTER DECLARATIONS ====

// SELECTOR WITH USER ASSIGNED ADDRESS

// RESULT : address = 0xc0, size in byte(s) = 1, …

// ==== END SOFT MODULE REGISTER DECLARATIONS ====

Work-Around

To work around this bug in FastChip 2.3.0, you must provide the physical address used within the E5. The address depends the specific address space, SFR or XDATA, and the logical address within that space, as shown in the following equation.

ADDRESS = PHYSICAL_BASE_ADDRESS + LOGICAL_ADDRESS

The physical base address for SFR and XDATA spaces is shown in Table_1. For XDATA space, the logic address must be above the space allocated to the internal SRAM inside every E5 device. For example, in the E520 device, XDATA addresses must be above 40K-bytes or 0xA000.

Table 1. Physical Base Address for Various E5 Address Spaces

Address Space	Physical Base Address
SFR	0x1FFF00
XDATA	0x100000

In the example above, the Command Register was assigned to SFR location 0xC0. To work-around the FastChip 2.3.0 bug, assign the Command Register to physical address 0x1FFFC0, which corresponds to SFR location 0xC0.

Assign physical address 0x1FFFC0 in order to assign the Command Register to SFR location 0xC0.

Subsequently, when you click Generate, FastChip correctly assigns the Command Register to the desired location.

// ==== BEGIN SOFT MODULE REGISTER DECLARATIONS ====

SFR_BYTE (RESULT,0xc0)

// SELECTOR WITH USER ASSIGNED ADDRESS

// RESULT : address = 0x1fffc0, size in byte(s) = 1, …

// ==== END SOFT MODULE REGISTER DECLARATIONS ====

The specific FastChip soft IP modules affected by this bug include the following.

· Command Register v.2

· Status Register v.2

FastChip Version: 2.3.0

This solution may or may not apply to other versions of the FastChip development system.